FDP
ASIC ANALOG AND DIGITAL DESIGN USING MENTOR GRAPHICS




Date: 23 & 24 November 2021
Two days Industrial training program for faculty was organized on 23rd & 24th Nov 2021. The topic was “ASIC Analog and Digital design Using Mentor Graphics”. The agenda for the training is as below:
Day 1 – Session 1: 10.00 am – 1.00 pm
• Introduction to ASIC Analog flow
• Implement Schematic circuit design & Transistor Width variation
Day 1 – Session 2: 2.00 pm – 4.30 pm
• Implement layout circuit design
• Physical verification & Post layout verification
Tools : Tanner, calibre , Example : Inverter